Desenvolvimento Nordestino

com Responsabilidade Social e Ambiental

LINCS, LAD e Chips

Posted by Desenvolvimento Nordestino em agosto 10, 2007

TOPICO RELACIONADO: http://www.orkut.com/CommMsgs.aspx?cmm=6205238&tid=2503208571920397668 

“O Laboratório para Integração de Circuitos e Sistemas (LINCS) é um laboratório de P&D no Centro de Tecnologias Estratégicas do Nordeste (CETENE). Sua missão é prover serviços de projetos e P&D de alta-qualidade no projeto de circuitos e sistemas.”

http://www.lincs.org.br/index.php?q=pt/o_lincs

 Trabalha em parceria com o LAD:

“O LAD – Laboratório de Arquiteturas Dedicadas projetou o primeiro decodificador para o padrão de vídeo MPEG4 para dispositivos móveis.
O LAD tem como uma das suas áreas de pesquisa o desenvolvimento e prototipagem de sistemas híbridos (software/hardware) de alto desempenho e baixo custo. O laboratório é coordenado pelo Prof. Dr. Elmar Melcher e conta com uma equipe qualificada participante de diversos projetos no âmbito nacional e internacional, dentre os quais destaca-se o Projeto Fênix/Brazil-IP.”

http://www.dsc.ufcg.edu.br/~pet/jornal/novembro2006/ocurso.htm 

  O LAD em 2006 participou de um projeto premiado pela IP-SOC Design Conference and Exhibition : “Best IP/SOC 2006 Design Award”. A matéria segue abaixo (nao sei o link)…

“Brazil has joined the global silicon IP club
EE Times: Latest News
Brazil design team joins IP silicon club

Richard Wallace
EE Times
(12/07/2006 7:07 PM EST)

GRENOBLE, France — Brazil has joined the global silicon IP club by fielding an award-winning, first-pass MPEG-4 processor IP core that is one of the most complex VLSI designs ever developed in Brazil, a development destined to put South America on the world’s growing list of system-on-chip IP providers.

A multi-university Brazilian design engineering team behind the IP silicon core worked under the auspices of Brazil’s Ministry of Science and Technology. It took top honors and the “Best IP/SOC 2006 Design Award” in the university category at the annual IP-SOC Design Conference and Exhibition held here this week. The title of the winning paper was “Silicon Validated IP Cores Designed by the Brazil-IP Network” by authors by Ana Karina Rocha, Patricia Lira, Yang Yun Ju, Elmar Melcher, and Edna Barros.

The award recognized first-silicon success for an MPEG-4 IP core and other silicon IP in a system implementation designed using a unique VLSI design flow called ipPROSESS and a novel design methodology incorporating a VeriSC verification process.

The IP design process has been used by over 70 designers within the Brazil-IP Network, a consortium of eight Brazilian universities, to design a platform integrating several IP cores, including MPEG-4, MP3, USB and Bluetooth. The team is credited with significant reductions in design-cycle time for complex IP cores. The working system design, which was produced using both Synopsys and Forte EDA design tools, was featured in a table-top demonstration at the two-day IP/SOC conference.

The Brazilian design team was recently spun out of the government ministry and the universities that incubated the design team, including the Federal University of Campina Grande, Federal University of Pernmbuco and the University of Campinas. The formation of the new IP company, LINCS-CETENE (Recife, Brazil) was announced here by Elmar Melcher, the team’s senior engineer. In addition to Melcher, five other members of the team, Ana Karina Rocha, Lira, Yang Yun Ju, Barros and Guido Araujo.

IP/SOC’s Best Design Award in the industry category was won by a NEC Corp/Keio University design team (Tokyo) that developed a high-performance (1 Tb/sec) inductive-coupling transceiver to support a 3-D chip stacking in a system-in-package approach. Tteam designers were Noriyuki, Yoshihiro Nakagawa, Masamoto Tago, Muneo Fukaishi and Tadahiro Kuroda.

IP/SOC, now in its 10th year here, is sponsored by Design and Reuse, a design reuse and IP-management software company.

From an investment, market growth and product development perspective, the IP industry appears to be thriving. In terms of revenue growth, year-on-year growth from 2006 to 2008 is expected to hit between 22 and 26 percent, with IP market size approaching $2.6 billion by 2010, according to a Dataquest estimated cited by Jacques Benkowski of U.S. Venture Partners.

“After many years marked by few stellar successes and a majority of moderate companies, the field of semiconductor IP seems finally ready for a broader expansion. The customer understanding of the value-add has improved, the business models have been stabilized and several quality companies are emerging,” Benkowski said. “

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